1. Field of the Invention
The present invention relates to diode arrays and, more particularly, to means for facilitating scribing of a light-emitting diode LED array fabrication wafer to separate individual array chips.
2. Description Relative to the Prior Art
LED arrays are well known in the prior art and are typically used in printheads for electrophotographic copiers or the like. Such a printhead array comprises a row of uniformly spaced LED light sources that can be individually energized to expose a photoreceptor or other image-receiving medium to produce an image pattern. A typical LED printhead array of this type for standard DIN A4 paper dimensions would be about 216 millimeters long and the individual light sources are very small and very closely spaced, e.g., as many as 600 or more sites per linear inch, which makes it impossible at the present state of the art to provide a full length LED array in one piece. Accordingly, the complete printhead array comprises a number of individual array chips, each being typically less than 10 millimeters long, which are mounted in end-wise relation to one another to provide the full length printhead array.
A typical basic process for providing such LED array chips, greatly simplified for purposes of explanation, uses a substrate wafer comprising a layer of gallium arsenide, supporting one or more epitaxial layers of gallium arsenide phosphide. A diffusion barrier layer of silicon nitride or some other glass-like material is then coated over the epitaxial layer and photolithographic techniques are used to produce a patterned photoresist on this layer so that an etching procedure can be employed to etch diode site openings through the barrier diffusion barrier material, whereupon the photoresist material is completely removed A dopant material, such as zinc, is then diffused into the gallium arsenide phosphide epitaxial layer using conventional semiconductor diffusion processes, with the silicon nitride layer acting as a barrier to protect other regions of the epitaxial layer. A silicon dioxide barrier layer is provided at the back side of the wafer during the high temperature diffusion process. By providing excess holes in the doped epitaxial regions, the doping process defines each light emitting site as a p-n junction in which the doped site is positive and the surrounding epitaxial material is negative by virtue of its inclusion of a trace material such as tellurium, which is added to the epitaxial layer in the process of producing the initial wafer with its epitaxial layer or layers. After the dopant procedure has been completed, the silicon dioxide barrier layer is removed and the wafer is then again covered with a photoresist pattern to define electrode regions. A metal, typically aluminum, is then evaporated onto the wafer and a subsequent treatment causes the photoresist to swell and to lift the metal off the wafer except in the areas in which electrodes are desired. Finally, the entire wafer surface is coated with a hard anti-reflection coating, of silicon nitride or the like, to protect the chip and enhance the light output of the array chips. The reverse side of the wafer is then lapped to achieve controlled constant thickness of the wafer material (approximately 350 microns) and an ohmic contact material, typically comprising several layers of gold and other metals, is applied to the lower face of the wafer and the wafer is then heated to improve the ohmic contact on the lower wafer face. A photoresist material is then again applied to the upper or diode face of the wafer by photolithographic means and the anti-reflective coating is etched away down to the electrode metal to define bond pad regions by which the diode array chip is connected to appropriate electronic energizing means.
Various methods can be employed for separating the individual array chips on the wafer, including sawing and scribing the wafer and then cleaving it along the scribe lines. This procedure can be employed either by scribing the top or the bottom surface of the wafer, but the present invention relates to the method employing scribing the top surface which, particularly when used in conjunction with the present invention, reduces the danger of damaging the very critical face of the wafer that actually defines the light-emitting sites.
To effect proper cleavage of the wafer, it is necessary that the scribing tool, typically a diamond scribing point generally in the shape of an inverted trapezoid or pyramid, penetrate into the epitaxial layer of the substrate material. If this is accomplished simply by penetrating the scribing tool through the layers of the wafer overlying the epitaxial layer, there is danger of chipping the anti-reflective coating or the diffusion barrier coating and thereby damaging the endmost light-emitting site immediately adjacent the scribe line, which must be very close to the endmost diode-emitting site in order that the arrays may be abutted end-to-end with all of the light-emitting sites equally spaced throughout the length of the assembled printhead array. Also, because the anti-reflective coating material and the barrier layer material, typically silicon nitride, are very hard, penetrating through that material imposes additional wear on the diamond scribing tool and dictates substantially higher scribing pressure than is necessary if the scribing tool engages only the substantially softer gallium arsenide or gallium arsenide phosphide material. Accordingly, it has previously been suggested that very narrow, straight scribing channels, sometimes referred to as paths or streets, be provided through the overlying materials of the wafer to expose the gallium arsenide substrate or at least the epitaxial layer of the wafer to the scribing tool. As implied by the term "streets", such channels are straight and of uniform width, and are formed during the preceding fabrication procedure by using the above-described photolithographic and etching techniques at appropriate stages to expose the wafer material in those regions defining such channels or paths. However, because of the very close spacing required between the endmost LED site on each array and the corresponding end of the array chip, which limits the maximum width of the scribing channel between adjacent diode sites, the tapered shape of the scribing tool makes it very difficult to scribe a cleavage groove of an effective depth without contacting the material along the edge of the scribing channel, which poses a significant risk of chipping off or cracking that material and thereby damaging the adjacent diode site.